Transactions on Very Large Scale Integration ( Vlsi
نویسندگان
چکیده
منابع مشابه
Ieee Transactions on Core Vlsi Ieee Transactions on Image Processing Ieee Transactions on Digital System Design Ieee Transactions on Testing Ieee Transactions on Communication Ieee Transactions on Low Power Vlsi
متن کامل
On the Effect of Floorplanning on the Yield of Large Area Integrated Circuits - Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Until recently, VLSI designers rarely considered yield issues when selecting a floorplan for a newly designed chip. This paper demonstrates that for large area VLSI chips, especially those that incorporate some fault tolerance, changes in the floorplan can affect the projected yield. We study several general floorplan structures, make some specific recommendations, and apply them to actual VLSI...
متن کاملTrends of On-Chip Interconnects in Deep Sub-Micron VLSI
This paper discusses propagation delay error, transient response, and power consumption distribution due to inductive effects in optimal buffered on-chip interconnects. Inductive effect is said to be important to consider in deep submicron (DSM) VLSI design. However, study shows that the effect decreases and can be neglected in next technology nodes for such conditions. key words: on-chip inter...
متن کاملVLSI implementations of threshold logic-a comprehensive survey
This paper is an in-depth review on silicon implementations of threshold logic gates that covers several decades. In this paper, we will mention early MOS threshold logic solutions and detail numerous very-large-scale integration (VLSI) implementations including capacitive (switched capacitor and floating gate with their variations), conductance/current (pseudo-nMOS and output-wired-inverters, ...
متن کامل